Плата для тестирования полупроводников (плата нагрузки)
Опубликовано 2020-03-03Плата для тестирования полупроводников с поддержкой 4 печатных плат
Плата зонда используется для соединения тестера и контактной площадки на матрице в тесте CP. Обычно он используется в качестве физического интерфейса Loadboard. В некоторых случаях ProbeCard подключается к загрузочной плате через разъем или другую интерфейсную схему. Применение: Перед резкой пластины качество пластины можно проверить на компьютере, чтобы избежать плохих затрат на упаковку.
The test load board is a mechanical and circuit interface that connects the test equipment to the device under test. It is mainly used in the yield test of the semiconductor manufacturing back-end IC package. Through this stage of testing, defective functions can be eliminated. IC, to avoid subsequent scrap of electronic products due to bad ICs. The test load board is divided into 93K series, T2000 series, TUF series and so on according to the test platform.
BIB (BURN IN BOARD, burn-in test board), the IC that completes the package test burn-in test under specific conditions and time to verify the reliability of the IC. BIB is a PCB board used for IC burn-in testing.
Interposer Board: The signal of the Probe card is converted by the interposer interlayer so that the Probe head probe can receive the signal, and it can also smoothly transmit the signal to the test machine for interpretation.
This article only talks about Loadboard
Example: 38L Loadboard
Number of layers: 38L
Board thickness: 6.35mm
Material: TU872SLK
Thickness to diameter ratio: 30: 1
Resin plug hole, plating fill
Surface treatment: whole board 30U “+ partial OSP
Special: PTH countersink
Size: 768 * 570mm
Tested object: 0.2mm
Existing production capacity:
Lamination (PIN-LAM): Multilayer High-Speed FPGA PCB Production Technology Article
PTH: High-thickness-to-diameter copper-filled hole filling technology
PTH countersink
Board thickness comparison: the top is a 1.6mm dual panel, the lower four are Probecard and Loadboard
Difficulty summary:
As ICs become more and more sophisticated, more and more functions need to be tested, and the number of layers of test boards is getting thicker and larger.
First, the lamination offset
Second, ultra-high thickness-diameter ratio
Three, large size resin plug hole
Fourth, a variety of selective surface methods.